Hamming Tree: The Case for Memory-Aware Bit Flipping Reduction for NVM Indexing
Summary: Hamming Tree: a memory-aware index augmentation that routes writes to locations minimizing bit flips to extend NVM endurance. Plug-compatible with existing indexes, it cuts bit flips up to 93% versus memory-agnostic techniques with minimal structural change. (summarized by gpt-5-mini on Feb 09 2026)
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Authors
- 1. Saeed Kargar
- 2. Faisal Nawab
Incoming Citations (Sorted by Pagerank)
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| Rank | Citing Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 8,831 | Hamming Tree: The Case for Energy-Aware Indexing for NVMs | 2023 | SIGMOD | 4.4360431e-05 |
| 9,281 | Extending the Lifetime of NVM: Challenges and Opportunities | 2021 | VLDB | 4.3599319e-05 |
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Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.
| Rank | Cited Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 643 | FPTree: A Hybrid SCM-DRAM Persistent and Concurrent B-Tree for Storage Class Memory | 2016 | SIGMOD | 0.00018733394 |
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