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CellSort: High Performance Sorting on the Cell Processor

Summary: CellSort exploits Cell’s heterogeneous SPE architecture with a three-tier SIMD/in-core/out-of-core bitonic pipeline. Asynchronous DMA and fine-grained SIMDization deliver up to 10× in-core and 4× large-memory sorting speedups over Xeon quicksort. (summarized by gpt-5.6-luna on Jul 24 2026)

Paper ID
9729
Venue
VLDB
Year
2007
Pagerank
9.1061768e-05
Overall Rank
2,139 | 85.33%
DOI
-

Incoming Non-self Citations Over Time

Authors

BibTeX Citation

@article{gedik_vldb07,
        title = {{CellSort: High Performance Sorting on the Cell Processor}},
        author = {Gedik, Bugra and Bordawekar, Rajesh R. and Yu, Philip S.},
        journal = {PVLDB},
        series = {{VLDB} '07},
        pages = {1286--1297},
        year = {2007}
}

Incoming Citations (Sorted by Pagerank)

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Outgoing Citations (Sorted by Pagerank)

Showing 2 of 2 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank Cited Paper Year Venue Pagerank
293 Implementing Database Operations Using SIMD Instructions 2002 SIGMOD 0.00022259273
305 GPUTeraSort: High Performance Graphics Co-processor Sorting for Large Database Management 2006 SIGMOD 0.00021872796
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