Efficient Event Processing through Reconfigurable Hardware for Algorithmic Trading
Summary: FPGA-based event processing platform enabling line-rate, low-latency processing for algo trading. FPGA-ToPSS uses a reconfigurable hardware engine with expressive predicates to model complex strategies and autonomously execute trades in real time. (summarized by gpt-5-nano on Feb 09 2026)
Incoming Non-self Citations Over Time
Authors
- 1. Mohammad Sadoghi
- 2. Martin Labrecque
- 3. Harsh Singh
- 4. Warren Shum
- 5. Hans-Arno Jacobsen
Incoming Citations (Sorted by Pagerank)
Showing 7 of 7 citing papers.
| Rank | Citing Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 1,882 | Ibex - An Intelligent Storage Engine with Support for Advanced SQL Off-loading | 2014 | VLDB | 0.00010210181 |
| 3,790 | Skeleton Automata for FPGAs: Reconfiguring without Reconstructing | 2012 | SIGMOD | 6.7612326e-05 |
| 3,793 | Complex Event Detection at Wire Speed with FPGAs | 2010 | VLDB | 6.7561977e-05 |
| 4,383 | Flexible Query Processor on FPGAs | 2013 | VLDB | 6.2274297e-05 |
| 5,869 | Low-Latency Handshake Join | 2014 | VLDB | 5.2918426e-05 |
| 6,249 | BE-Tree: An Index Structure to Efficiently Match Boolean Expressions over High-dimensional Discrete Space | 2011 | SIGMOD | 5.132996e-05 |
| 8,433 | Histograms as a Side Effect of Data Movement for Big Data | 2014 | SIGMOD | 4.5078508e-05 |
Previous
Page 1 / 1
Next
Outgoing Citations (Sorted by Pagerank)
Showing 3 of 3 cited papers.
Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.
| Rank | Cited Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 948 | Data Processing on FPGAs | 2009 | VLDB | 0.0001510759 |
| 2,058 | Boosting XML Filtering with a Scalable FPGA-based Architecture | 2009 | CIDR | 9.6646475e-05 |
| 2,279 | Streams on Wires — A Query Compiler for FPGAs | 2009 | VLDB | 9.1249844e-05 |
Previous
Page 1 / 1
Next
Semantically Similar Papers
| Overall Rank | Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 12,671 | A-TOPSS - A Publish/Subscribe System Supporting Approximate Matching | 2002 | VLDB | 4.1905499e-05 |
| 259 | High-Performance Complex Event Processing over Streams | 2006 | SIGMOD | 0.00030155645 |
| 8,344 | Event Trend Aggregation Under Rich Event Matching Semantics | 2019 | SIGMOD | 4.5363237e-05 |
| 2,058 | Boosting XML Filtering with a Scalable FPGA-based Architecture | 2009 | CIDR | 9.6646475e-05 |
| 10,897 | Program your (custom) SIMD instruction set on FPGA in C++ | 2024 | CIDR | 4.1905499e-05 |
| 11,554 | Efficient Hard Real-Time Transaction Processing - Unachievable in Software | 2020 | CIDR | 4.1905499e-05 |
| 12,321 | Supporting a Spectrum of Out-of-Order Event Processing Technologies: From Aggressive to Conservative Methodologies | 2009 | SIGMOD | 4.1905499e-05 |
| 948 | Data Processing on FPGAs | 2009 | VLDB | 0.0001510759 |
| 4,383 | Flexible Query Processor on FPGAs | 2013 | VLDB | 6.2274297e-05 |
| 3,793 | Complex Event Detection at Wire Speed with FPGAs | 2010 | VLDB | 6.7561977e-05 |