Efficient Event Processing through Reconfigurable Hardware for Algorithmic Trading

Summary: fpga-ToPSS uses reconfigurable FPGAs for line-rate, low-latency publish/subscribe event processing in high-frequency trading. Its distinctive engine performs expressive Boolean predicate matching, enabling autonomous execution of complex financial strategies. (summarized by gpt-5.6-luna on Jul 24 2026)

Paper ID: h3a2b03b0737d2e75
Venue: VLDB
Year: 2010
Pagerank: 6.8975983e-05
Overall Rank: 3,937 | 73.62%
DOI: 10.14778/1920841.1921029

Incoming Non-self Citations Over Time

Authors

1. Mohammad Sadoghi (University of Toronto)
2. Martin Labrecque (University of Toronto)
3. Harsh Singh (University of Toronto)
4. Warren Shum (University of Toronto)
5. Hans-Arno Jacobsen (University of Toronto)

BibTeX Citation

@article{sadoghi_vldb10,
        title = {{Efficient Event Processing through Reconfigurable Hardware for Algorithmic Trading}},
        author = {Sadoghi, Mohammad and Labrecque, Martin and Singh, Harsh and Shum, Warren and Jacobsen, Hans-Arno},
        journal = {PVLDB},
        series = {{VLDB} '10},
        volume = {3},
        number = {2},
        doi = {10.14778/1920841.1921029},
        url = {https://doi.org/10.14778/1920841.1921029},
        year = {2010}
}

Incoming Citations (Sorted by Pagerank)

Showing 7 of 7 citing papers.

Rank	Citing Paper	Year	Venue	Pagerank
1,782	Ibex—An Intelligent Storage Engine with Support for Advanced SQL Off-loading	2014	VLDB	9.6551269e-05
3,834	Complex Event Detection at Wire Speed with FPGAs	2010	VLDB	6.971628e-05
3,879	Skeleton Automata for FPGAs: Reconfiguring without Reconstructing	2012	SIGMOD	6.9324155e-05
4,374	Flexible Query Processor on FPGAs	2013	VLDB	6.6188479e-05
5,455	Low-Latency Handshake Join	2014	VLDB	6.107413e-05
6,162	BE-Tree: An Index Structure to Efficiently Match Boolean Expressions over High-dimensional Discrete Space	2011	SIGMOD	5.8512412e-05
8,600	Histograms as a Side Effect of Data Movement for Big Data	2014	SIGMOD	5.2913419e-05

Outgoing Citations (Sorted by Pagerank)

Showing 3 of 3 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank	Cited Paper	Year	Venue	Pagerank
945	Data Processing on FPGAs	2009	VLDB	0.00012924215
2,223	Streams on Wires — A Query Compiler for FPGAs	2009	VLDB	8.8041296e-05
2,639	Boosting XML Filtering with a Scalable FPGA-based Architecture	2009	CIDR	8.175858e-05

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