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STEPS Towards Cache-Resident Transaction Processing

Summary: Steps multiplexes concurrent OLTP transactions so leading executions populate shared instruction-cache paths for followers, reducing instruction-cache misses without enlarging caches. On Shore/TPC-C, it cuts misses by up to 96.7% and branch mispredictions by 64%. (summarized by gpt-5.6-luna on Jul 24 2026)

Paper ID
hc0612eac73ebe797
Venue
VLDB
Year
2004
Pagerank
5.6828195e-05
Overall Rank
6,784 | 54.39%
DOI
10.1016/B978-012088469-8.50059-0

Incoming Non-self Citations Over Time

Authors

BibTeX Citation

@article{harizopoulos_vldb04,
        title = {{STEPS Towards Cache-Resident Transaction Processing}},
        author = {Harizopoulos, Stavros and Ailamaki, Anastassia},
        journal = {PVLDB},
        series = {{VLDB} '04},
        pages = {660},
        doi = {10.1016/B978-012088469-8.50059-0},
        url = {https://doi.org/10.1016/B978-012088469-8.50059-0},
        year = {2004}
}

Incoming Citations (Sorted by Pagerank)

Showing 4 of 4 citing papers.

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Outgoing Citations (Sorted by Pagerank)

Showing 6 of 6 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank Cited Paper Year Venue Pagerank
48 Weaving Relations for Cache Performance 2001 VLDB 0.00043805923
76 Cache Conscious Algorithms for Relational Query Processing 1994 VLDB 0.00036898845
110 DBMSs On A Modern Processor: Where Does Time Go? 1999 VLDB 0.00032700879
302 Shoring Up Persistent Applications 1994 SIGMOD 0.0002167061
548 Improving Index Performance through Prefetching 2001 SIGMOD 0.00016569534
939 Buffering Database Operations for Enhanced Instruction Cache Performance 2004 SIGMOD 0.00012970078
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