DBScholar

Back to papers

Is FPGA Useful for Hash Joins? Exploring Hash Joins on Coupled CPU-FPGA Architecture

Summary: Empirical exploration of hash-join acceleration on coupled CPU–FPGA (shared-memory) using OpenCL HLS and a roofline-guided analysis to identify optimal CPU/FPGA workload partitioning. Finds FPGA benefit constrained by system memory bandwidth and forecasts needed CPU–FPGA architectural features for DB workloads. (summarized by gpt-5-mini on Feb 09 2026)

Paper ID
362
Venue
CIDR
Year
2020
Pagerank
5.1947648e-05
Overall Rank
9,939 | 31.81%
DOI
-

Incoming Non-self Citations Over Time

Authors

BibTeX Citation

@inproceedings{chen_cidr20,
        address = {Amsterdam, Netherlands},
        series = {{CIDR} '20},
        title = {{Is FPGA Useful for Hash Joins? Exploring Hash Joins on Coupled CPU-FPGA Architecture}},
        booktitle = {Proceedings of the {Conference} on {Innovative} {Data} {Systems} {Research}},
        author = {Chen, Xinyu and Chen, Yao and Bajaj, Ronak and He, Jiong and He, Bingsheng and Wong, Weng-Fai and Chen, Deming},
        year = {2020}
}

Incoming Citations (Sorted by Pagerank)

Showing 1 of 1 citing papers.

Rank Citing Paper Year Venue Pagerank
8,234 The Case for Learned In-Memory Joins 2023 VLDB 5.460955e-05
Previous Page 1 / 1 Next

Outgoing Citations (Sorted by Pagerank)

Showing 4 of 4 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank Cited Paper Year Venue Pagerank
360 Design and Evaluation of Main Memory Hash Join Algorithms for Multi-core CPUs 2011 SIGMOD 0.00020182846
1,265 An Experimental Comparison of Thirteen Relational Equi-Joins in Main Memory 2016 SIGMOD 0.00011415709
4,840 FPGA-based Data Partitioning 2017 SIGMOD 6.483442e-05
5,515 FPGA-based Multithreading for In-Memory Hash Joins 2015 CIDR 6.189963e-05
Previous Page 1 / 1 Next

Semantically Similar Papers