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FPGA-based Multithreading for In-Memory Hash Joins

Summary: First end-to-end in-memory FPGA hash join using massive multithreading to hide memory latency during build/probe with hundreds of on-chip thread contexts. 2–3.4× faster than multicore at similar bandwidth (up to 76.8GB/s, 1.6B tps); benefit drops on extreme skew. (summarized by gpt-5-mini on Feb 09 2026)

Paper ID
253
Venue
CIDR
Year
2015
Pagerank
6.189963e-05
Overall Rank
5,515 | 62.17%
DOI
-

Incoming Non-self Citations Over Time

Authors

BibTeX Citation

@inproceedings{halstead_cidr15,
        address = {Amsterdam, Netherlands},
        series = {{CIDR} '15},
        title = {{FPGA-based Multithreading for In-Memory Hash Joins}},
        booktitle = {Proceedings of the {Conference} on {Innovative} {Data} {Systems} {Research}},
        author = {Halstead, Robert J. and Absalyamov, Ildar and Najjar, Walid A. and Tsotras, Vassilis J.},
        year = {2015}
}

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