Scotch: Generating FPGA-Accelerators for Sketching at Line Rate

Summary: Scotch compiles high-level specifications of a broad class of streaming sketches into FPGA accelerators, automating hardware generation and summary-size autotuning. It achieves up to 100× CPU/GPU throughput and 5× better energy efficiency for line-rate maintenance. (summarized by gpt-5.6-luna on Jul 24 2026)

Paper ID: 12667
Venue: VLDB
Year: 2021
Pagerank: 5.3532614e-05
Overall Rank: 8,878 | 39.09%
DOI: 10.14778/3430915.3430919

Incoming Non-self Citations Over Time

Authors

1. Martin Kiefer (Technical University of Berlin)
2. Ilias Poulakis (Technical University of Berlin)
3. Sebastian Breß (Technical University of Berlin)
4. Volker Markl (German National Research Center for Information Technology; Technical University of Berlin)

BibTeX Citation

@article{kiefer_vldb21,
        title = {{Scotch: Generating FPGA-Accelerators for Sketching at Line Rate}},
        author = {Kiefer, Martin and Poulakis, Ilias and Breß, Sebastian and Markl, Volker},
        journal = {PVLDB},
        series = {{VLDB} '21},
        volume = {14},
        number = {3},
        pages = {281--293},
        doi = {10.14778/3430915.3430919},
        url = {https://doi.org/10.14778/3430915.3430919},
        year = {2021}
}

Incoming Citations (Sorted by Pagerank)

Showing 3 of 3 citing papers.

Rank	Citing Paper	Year	Venue	Pagerank
7,069	SKT: A One-Pass Multi-Sketch Data Analytics Accelerator	2021	VLDB	5.7117595e-05
8,356	Optimistic Data Parallelism for FPGA-Accelerated Sketching	2023	VLDB	5.4450094e-05
11,700	In the Land of Data Streams where Synopses are Missing, One Framework to Bring Them All	2021	VLDB	5.093636e-05

Outgoing Citations (Sorted by Pagerank)

Showing 11 of 11 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank	Cited Paper	Year	Venue	Pagerank
418	Tracking Join and Self-Join Sizes in Limited Storage	1999	PODS	0.00018812821
451	Mergeable Summaries	2012	PODS	0.00018151445
737	Join Size Estimation Subject to Filter Conditions	2015	VLDB	0.00014490983
922	Data Processing on FPGAs	2009	VLDB	0.00013207382
1,045	Sketching Streams Through the Net: Distributed Approximate Query Tracking	2005	VLDB	0.00012440928
1,495	LSH Ensemble: Internet-Scale Domain Search	2016	VLDB	0.00010571481
1,773	Ibex—An Intelligent Storage Engine with Support for Advanced SQL Off-loading	2014	VLDB	9.7895875e-05
2,181	Streams on Wires — A Query Compiler for FPGAs	2009	VLDB	9.0101847e-05
2,455	DDSketch: A Fast and Fully-Mergeable Quantile Sketch with Relative-Error Guarantees	2019	VLDB	8.5552968e-05
2,747	Moment-Based Quantile Sketches for Efficient High Cardinality Aggregation Queries	2018	VLDB	8.1711208e-05
7,713	Sketch-based Querying of Distributed Sliding-Window Data Streams	2012	VLDB	5.5610113e-05

Semantically Similar Papers

#	Overall Rank	Paper	Year	Venue
1	9,939	Is FPGA Useful for Hash Joins? Exploring Hash Joins on Coupled CPU-FPGA Architecture	2020	CIDR
2	2,181	Streams on Wires — A Query Compiler for FPGAs	2009	VLDB
3	8,851	Memory-Efficient and Flexible Detection of Heavy Hitters in High-Speed Networks	2023	SIGMOD
4	4,840	FPGA-based Data Partitioning	2017	SIGMOD
5	7,170	Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration	2020	VLDB
6	1,294	Augmented Sketch: Faster and More Accurate Stream Processing	2016	SIGMOD
7	922	Data Processing on FPGAs	2009	VLDB
8	4,313	Flexible Query Processor on FPGAs	2013	VLDB
9	7,069	SKT: A One-Pass Multi-Sketch Data Analytics Accelerator	2021	VLDB
10	8,356	Optimistic Data Parallelism for FPGA-Accelerated Sketching	2023	VLDB