Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration
Summary: An FPGA-based decision-tree ensemble accelerator targets search scoring, reducing data movement and enabling pipeline-stage fusion. Evaluated on Amazon F1, it delivers compact, massively parallel scoring and up to two orders-of-magnitude speedup over CPUs. (summarized by gpt-5.6-luna on Jul 24 2026)
Incoming Non-self Citations Over Time
Authors
- 1. Muhsen Owaida (ETH Zurich)
- 2. Gustavo Alonso (ETH Zurich)
- 3. Laura Fogliarini (Amadeus)
- 4. Anthony Hock-Koon (Amadeus)
- 5. Pierre-Etienne Melet (Amadeus)
BibTeX Citation
@article{owaida_vldb20,
title = {{Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration}},
author = {Owaida, Muhsen and Alonso, Gustavo and Fogliarini, Laura and Hock-Koon, Anthony and Melet, Pierre-Etienne},
journal = {PVLDB},
series = {{VLDB} '20},
volume = {13},
number = {1},
pages = {71--84},
doi = {10.14778/3357377.3357383},
url = {https://doi.org/10.14778/3357377.3357383},
year = {2020}
}
Incoming Citations (Sorted by Pagerank)
Showing 6 of 6 citing papers.
| Rank | Citing Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 2,566 | Pump Up the Volume: Processing Large Data on GPUs with Fast Interconnects | 2020 | SIGMOD | 8.4116562e-05 |
| 4,089 | TCUDB: Accelerating Database with Tensor Processors | 2022 | SIGMOD | 6.9096857e-05 |
| 5,871 | Cheetah: Accelerating Database Queries with Switch Pruning | 2020 | SIGMOD | 6.0604381e-05 |
| 9,544 | SwiftSpatial: Spatial Joins on Modern Hardware | 2025 | SIGMOD | 5.2528121e-05 |
| 9,568 | Making Search Engines Faster by Lowering the Cost of Querying Business Rules Through FPGAs | 2020 | SIGMOD | 5.2528121e-05 |
| 10,223 | Discovery of Denial Constraints with Hardware Acceleration | 2026 | SIGMOD | 5.093636e-05 |
Previous
Page 1 / 1
Next
Outgoing Citations (Sorted by Pagerank)
Showing 10 of 10 cited papers.
Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.
| Rank | Cited Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 1,879 | Predictable Performance for Unpredictable Workloads | 2009 | VLDB | 9.5613416e-05 |
| 1,994 | RainForest - A Framework for Fast Decision Tree Construction of Large Datasets | 1998 | VLDB | 9.3409624e-05 |
| 2,560 | PLANET: Massively Parallel Learning of Tree Ensembles with MapReduce | 2009 | VLDB | 8.4143663e-05 |
| 2,810 | BOAT—Optimistic Decision Tree Construction | 1999 | SIGMOD | 8.0985732e-05 |
| 3,682 | In-RDBMS Hardware Acceleration of Advanced Analytics | 2018 | VLDB | 7.2035518e-05 |
| 4,798 | Accelerating Generalized Linear Models with MLWeaving: A One-Size-Fits-All System for Any-Precision Learning | 2019 | VLDB | 6.5024772e-05 |
| 4,840 | FPGA-based Data Partitioning | 2017 | SIGMOD | 6.483442e-05 |
| 6,143 | ColumnML: Column-Store Machine Learning with On-The-Fly Data Transformation | 2019 | VLDB | 5.9622615e-05 |
| 8,199 | Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures | 2017 | SIGMOD | 5.4686907e-05 |
| 8,425 | doppioDB: A Hardware Accelerated Database | 2017 | SIGMOD | 5.426661e-05 |
Previous
Page 1 / 1
Next
Semantically Similar Papers
| # | Overall Rank | Paper | Year | Venue |
|---|---|---|---|---|
| 1 | 12,656 | Optimization of Frequent Itemset Mining on Multiple-Core Processor | 2007 | VLDB |
| 2 | 278 | FAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs | 2010 | SIGMOD |
| 3 | 9,939 | Is FPGA Useful for Hash Joins? Exploring Hash Joins on Coupled CPU-FPGA Architecture | 2020 | CIDR |
| 4 | 5,515 | FPGA-based Multithreading for In-Memory Hash Joins | 2015 | CIDR |
| 5 | 4,840 | FPGA-based Data Partitioning | 2017 | SIGMOD |
| 6 | 4,313 | Flexible Query Processor on FPGAs | 2013 | VLDB |
| 7 | 10,026 | DASH: Asynchronous Hardware Data Processing Services | 2023 | CIDR |
| 8 | 922 | Data Processing on FPGAs | 2009 | VLDB |
| 9 | 9,776 | Fast Graph Vector Search via Hardware Acceleration and Delayed-Synchronization Traversal | 2025 | VLDB |
| 10 | 9,568 | Making Search Engines Faster by Lowering the Cost of Querying Business Rules Through FPGAs | 2020 | SIGMOD |