Hamming Tree: The Case for Memory-Aware Bit Flipping Reduction for NVM Indexing

Summary: Hamming Tree: a memory-aware index augmentation that routes writes to locations minimizing bit flips to extend NVM endurance. Plug-compatible with existing indexes, it cuts bit flips up to 93% versus memory-agnostic techniques with minimal structural change. (summarized by gpt-5-mini on Feb 09 2026)

Paper ID: 392
Venue: CIDR
Year: 2021
Pagerank: 5.093636e-05
Overall Rank: 11,623 | 20.26%
DOI: -

Incoming Non-self Citations Over Time

No non-self incoming citations found for this paper in this database.

Authors

1. Saeed Kargar (University of California Santa Cruz)
2. Faisal Nawab (University of California Santa Cruz)

BibTeX Citation

@inproceedings{kargar_cidr21,
        address = {Amsterdam, Netherlands},
        series = {{CIDR} '21},
        title = {{Hamming Tree: The Case for Memory-Aware Bit Flipping Reduction for NVM Indexing}},
        booktitle = {Proceedings of the {Conference} on {Innovative} {Data} {Systems} {Research}},
        author = {Kargar, Saeed and Nawab, Faisal},
        year = {2021}
}

Incoming Citations (Sorted by Pagerank)

Showing 2 of 2 citing papers.

Rank	Citing Paper	Year	Venue	Pagerank
8,833	Hamming Tree: The Case for Energy-Aware Indexing for NVMs	2023	SIGMOD	5.3599647e-05
9,423	Extending the Lifetime of NVM: Challenges and Opportunities	2021	VLDB	5.2717556e-05

Outgoing Citations (Sorted by Pagerank)

Showing 1 of 1 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank	Cited Paper	Year	Venue	Pagerank
491	FPTree: A Hybrid SCM-DRAM Persistent and Concurrent B-Tree for Storage Class Memory	2016	SIGMOD	0.00017575163

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