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Interleaved Multi-Vectorizing

Summary: Interleaved multi-vectorizing (IMV) hides SIMD cache-miss latency by interleaving multiple vectorized execution instances and using prefetching. Residual vectorized states address control-flow divergence, accelerating pointer-chasing and full query pipelines by up to 3.17× over SIMD. (summarized by gpt-5.6-luna on Jul 24 2026)

Paper ID
h9c812ad51f4b82d0
Venue
VLDB
Year
2020
Pagerank
5.3429493e-05
Overall Rank
8,380 | 43.66%
DOI
10.14778/3368289.3368290

Incoming Non-self Citations Over Time

Authors

BibTeX Citation

@article{fang_vldb20,
        title = {{Interleaved Multi-Vectorizing}},
        author = {Fang, Zhuhe and Zheng, Beilei and Weng, Chuliang},
        journal = {PVLDB},
        series = {{VLDB} '20},
        volume = {13},
        number = {3},
        pages = {226--238},
        doi = {10.14778/3368289.3368290},
        url = {https://doi.org/10.14778/3368289.3368290},
        year = {2020}
}

Incoming Citations (Sorted by Pagerank)

Showing 4 of 4 citing papers.

Rank Citing Paper Year Venue Pagerank
234 TiDB: A Raft-based HTAP Database 2020 VLDB 0.00023765806
3,709 CoroBase: Coroutine-Oriented Main-Memory Database Engine 2021 VLDB 7.0791362e-05
4,243 The Art of Latency Hiding in Modern Database Engines 2024 VLDB 6.7069789e-05
5,543 Charting the Design Space of Query Execution using VOILA 2021 VLDB 6.0889645e-05
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Outgoing Citations (Sorted by Pagerank)

Showing 16 of 16 cited papers.

Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.

Rank Cited Paper Year Venue Pagerank
14 MonetDB/X100: Hyper-Pipelining Query Execution 2005 CIDR 0.00064031282
21 Efficiently Compiling Efficient Query Plans for Modern Hardware 2011 VLDB 0.00056855599
27 Database Architecture Optimized for the New Bottleneck: Memory Access 1999 VLDB 0.0005158963
215 Morsel-Driven Parallelism: A NUMA-Aware Query Evaluation Framework for the Many-Core Age 2014 SIGMOD 0.00024598661
282 FAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs 2010 SIGMOD 0.00022264207
287 Implementing Database Operations Using SIMD Instructions 2002 SIGMOD 0.00021970198
605 Everything You Always Wanted to Know About Compiled and Vectorized Queries But Were Afraid to Ask 2018 VLDB 0.00015647561
627 Rethinking SIMD Vectorization for In-Memory Databases 2015 SIGMOD 0.00015460957
722 Efficient Implementation of Sorting on Multi-Core SIMD CPU Architecture 2008 VLDB 0.00014488003
1,341 Relaxed Operator Fusion for In-Memory Databases: Making Compilation, Vectorization, and Prefetching Work Together At Last 2018 VLDB 0.00010968512
2,673 Asynchronous Memory Access Chaining 2016 VLDB 8.1482775e-05
2,809 Exploiting Coroutines to Attack the "Killer Nanoseconds" 2018 VLDB 7.9825078e-05
2,925 Interleaving with Coroutines: A Practical Approach for Robust Index Joins 2018 VLDB 7.8482706e-05
3,289 Faster Set Intersection with SIMD instructions by Reducing Branch Mispredictions 2015 VLDB 7.4528818e-05
3,459 Improving Main Memory Hash Joins on Intel Xeon Phi Processors: An Experimental Approach 2015 VLDB 7.2848113e-05
4,225 SIMD- and Cache-Friendly Algorithm for Sorting an Array of Structures 2015 VLDB 6.7207703e-05
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