Fast Graph Vector Search via Hardware Acceleration and Delayed-Synchronization Traversal
Summary: Co-design of Falcon, an FPGA-based GVS accelerator with pipelined GVS operators and on-chip Bloom-filter state tracking, and Delayed-Synchronization Traversal (DST) that relaxes traversal order to maximize parallelism/utilization. Shows up to 4.3–19.5× lower latency and 8–26.9× higher energy efficiency vs CPU/GPU baselines. (summarized by gpt-5-mini on Feb 09 2026)
Incoming Non-self Citations Over Time
Authors
- 1. Wenqi Jiang (ETH Zurich)
- 2. Hang Hu (ETH Zurich)
- 3. Torsten Hoefler (ETH Zurich)
- 4. Gustavo Alonso (ETH Zurich)
BibTeX Citation
@article{jiang_vldb25,
title = {{Fast Graph Vector Search via Hardware Acceleration and Delayed-Synchronization Traversal}},
author = {Jiang, Wenqi and Hu, Hang and Hoefler, Torsten and Alonso, Gustavo},
journal = {PVLDB},
series = {{VLDB} '25},
volume = {18},
number = {11},
pages = {3797--3811},
doi = {10.14778/3749646.3749655},
url = {https://doi.org/10.14778/3749646.3749655},
year = {2025}
}
Incoming Citations (Sorted by Pagerank)
Showing 1 of 1 citing papers.
| Rank | Citing Paper | Year | Venue | Pagerank |
|---|---|---|---|---|
| 10,209 | CMANNS: GPU-Accelerated Graph Index Construction for ANNS via Compute-Memory Disaggregation | 2026 | SIGMOD | 5.093636e-05 |
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Outgoing Citations (Sorted by Pagerank)
Showing 32 of 32 cited papers.
Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.
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