FAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs
Summary: FAST is architecture-sensitive binary-tree index layout for CPUs/GPUs, aligned to cache lines, page size, and SIMD to reduce traversal latency. 50M CPU/GPU queries/sec (5x/1.7x faster); bulk rebuilds <0.1s for 64M keys; compression mitigates memory bandwidth. (summarized by gpt-5-nano on Feb 09 2026)
Incoming Non-self Citations Over Time
Authors
- 1. Changkyu Kim (Intel)
- 2. Jatin Chhugani (Intel)
- 3. Nadathur Satish (Intel)
- 4. Eric Sedlar (Oracle)
- 5. Anthony D. Nguyen (Intel)
- 6. Tim Kaldewey (Oracle)
- 7. Victor W. Lee (Intel)
- 8. Scott A. Brandt (University of California Santa Cruz)
- 9. Pradeep Dubey (Intel)
BibTeX Citation
@inproceedings{kim_sigmod10,
title = {{FAST: Fast Architecture Sensitive Tree Search on Modern CPUs and GPUs}},
author = {Kim, Changkyu and Chhugani, Jatin and Satish, Nadathur and Sedlar, Eric and Nguyen, Anthony D. and Kaldewey, Tim and Lee, Victor W. and Brandt, Scott A. and Dubey, Pradeep},
series = {{SIGMOD} '10},
booktitle = {Proceedings of the {ACM} {SIGMOD} International Conference on Management of Data},
publisher = {Association for Computing Machinery},
doi = {10.1145/1807167.1807206},
url = {https://dl.acm.org/doi/10.1145/1807167.1807206},
year = {2010}
}
Incoming Citations (Sorted by Pagerank)
Showing 50 of 54 citing papers.
Outgoing Citations (Sorted by Pagerank)
Showing 15 of 15 cited papers.
Citations counted here include only citations to other VLDB/SIGMOD/CIDR/PODS papers in this database.
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